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Title:
AMPLITUDE EQUALIZER
Document Type and Number:
Japanese Patent JPS59210718
Kind Code:
A
Abstract:

PURPOSE: To reduce considerably the amount of a DC offset by driving all switching means by a two-phase clock, and grounding some of the means and the remaining means in opposite-phase relation.

CONSTITUTION: A figure A shows an amplitude equalizer which uses a switched capacitor which has a small DC offset. In the figure, C1 and C2 are integral capacitors. A figure B shows an RC equivalent circuit. The transfer function T2Z-1 of the area Z of the circuit is expressed by an equality I . In the figure B, E1in and feeding voltages for the amount of the DC offset, and R1in and R2in are driving resistances for the amount of the DC offset. The amount Vout0 of the DC offset at the output terminal of the circuit is expressed by an equation II. When the amount of the DC offset is reduced, the R1 is decreased and K4 should be large in the figure A. This invention realizes a circuit which has larger K4 than before.


Inventors:
KOMAZAKI TOMOKAZU
KAWAKAMI IZUMI
Application Number:
JP8402383A
Publication Date:
November 29, 1984
Filing Date:
May 16, 1983
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H03H19/00; H04B3/14; (IPC1-7): H03H19/00
Attorney, Agent or Firm:
Keiichi Yamamoto



 
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