To provide an analog-digital conversion circuit capable of performing analog-digital conversion at a high speed by using a pulse signal whose clock frequency is low.

The analog-digital conversion circuit is provided with a subtraction circuit section in which a first analog signal is supplied to a first input terminal; a detection circuit section to which an output signal from the subtraction circuit section is supplied; a control circuit section to which an output signal from the detection circuit section is supplied, and which selects any accumulation mode determined according to the output signal from the detection circuit section out of a plurality of accumulation modes, and performs accumulation by using a time interval corresponding to the selected accumulation mode and an increment value; and a digital-analog conversion circuit section to which the output signal from the control circuit section is inputted, and which converts the output from the control circuit section into a second analog signal to supply the converted signal to a second input terminal of the subtraction circuit section.