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Title:
ANALOG-DIGITAL CONVERSION SYSTEM
Document Type and Number:
Japanese Patent JPS5518112
Kind Code:
A
Abstract:

PURPOSE: To avoid the saturation for the output of the amplifier and thus to secure the steady and accurate A/D conversion by minimizing the gain of the amplifier pre- positioned to the A/D converter during decision of the input level.

CONSTITUTION: The A/D converter 22 is pre-positioned with amplifier 21 the gain of which can vary according to the input levels in order to increase the dynamic range. The input is discriminated through level decision circuit 23, and the gain of amplifier 21 is switched via switch 27 in accordance with the output of circuit 23. Now in case the input signal varies at time t1, which region the new input signal is belonging to is decided at time t2. Level "1" is given to latch circuit 25 via awitch 24 in the period of t1∼t2 in order to minimize the gain of amplifier 21. As a rsult, the output of amplifier 21 can be prevented from being saturated with input of the next signal during the level decision.


Inventors:
NABESHIMA TOMOKI
KATAYAMA YOSHITAKA
Application Number:
JP9035978A
Publication Date:
February 08, 1980
Filing Date:
July 26, 1978
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H03M1/18; G11B5/09; G11B20/10; (IPC1-7): G11B5/09; H03K13/02



 
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