PURPOSE: To obtain an inexpensive AD converter with fast converting speed by using an output of a reference voltage generating source generating plural reference voltages as a reference input of each block and using an analog input as a comparator input of the 1st stage block.

CONSTITUTION: A comparison input X and a reference input Y are inputted to a comparator 1 and a subtractor 2, the comparator 1 compares the quantity of the X and Y and the subtractor 2 applies subtraction of (X-Y). The comparison output X, a subtraction output S of the subtractor 2 and an output Z of the comparator 1 are inputted to a switch 3 and when the comparator output Z is logical 0, the comparison output X is outputted and when logical 1, the subtraction output S is outputted, a switch output B of the pre-stage block is given as the comparison input X of the next-stage block, a reference voltage generating source 9 generates plural reference voltages, which are used as the reference input to each basic circuit block. Then similar operations are applied up to the final stage block 8. The speed of the AD conversion is the sum of processing speeds of each basic circuit block and the processing speed of the basic circuit block depends on the comparator 1 or the subtractor 2, operated more slowly, and the switch 3. Thus, the converting speed is quickened very fast.