PURPOSE: To provide the analog input selection circuit whose input circuit uses a passive filter without losing the processing efficiency in a switched capacitor circuit.

CONSTITUTION: The analog input selection circuit 300 selecting any of signals B1, B2, B3 from plural input circuits 91, 92, 93 and providing an output of a signal C to be received by a switched capacitor circuit 40 is provided with charge discharge circuits 310, 320, 330 whose capacitance is the same as an input capacitance of the switched capacitor circuit 40 and whose charge discharge period is synchronously with a sampling and holding timing of the switched capacitor circuit, and when any of the signals B1, B2, B3 is not selected as an input of the switched capacitor circuit 40, the signal is given to the charge discharge circuits 310, 320, 330. Thus, even when the signal B1 or the like is selected, the load state of the input circuit is unchanged and the input signal of the switched capacitor circuit is kept always to be a processed state, then no wait time is required to be provided.