Title:
アナログ信号検出回路
Document Type and Number:
Japanese Patent JP6431123
Kind Code:
B2
Abstract:
An analog signal detecting circuit (200) comprises a reference voltage generator (230) that outputs a plurality of reference voltages; the number of the reference voltages being varied depending on a voltage width between a minimum voltage value and a maximum voltage value of an analog signal. The analog signal detecting circuit (200) further comprises a plurality of comparators (240) that compares a voltage of the analog signal with each of the plurality of reference voltages output from the reference voltage generator; a plurality of pulse generators (250) that outputs a plurality of pulse signals having widths among the plurality of pulse signals varied depending on a frequency of the analog signal; and a combiner circuit section (260) that outputs the pulse signals from the plurality of pulse generators by summing up.
Inventors:
Song Jeon Kuk
Application Number:
JP2017079517A
Publication Date:
November 28, 2018
Filing Date:
April 13, 2017
Export Citation:
Assignee:
LSIS CO.,LTD.
International Classes:
G01R19/00
Domestic Patent References:
| JP50074461A | ||||
| JP53143377A | ||||
| JP51084279A | ||||
| JP6216724A | ||||
| JP4200229A |
Foreign References:
| US4069452 |
Attorney, Agent or Firm:
Atsushi Aoki
Jun Tsuruta
Tomohiro Minamiyama
Akira Kawai
Kenichi Nakamura
Minoru Takemoto
Jun Tsuruta
Tomohiro Minamiyama
Akira Kawai
Kenichi Nakamura
Minoru Takemoto