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Patent Searching and Data


Title:
ANALYTICAL METHOD FOR TROUBLE IN SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JP2005265829
Kind Code:
A
Abstract:

To provide an analytical method for a trouble in a semiconductor element capable of narrowing a troubled portion, in particular, as to the semiconductor element provided with an analogue integrated circuit.

A circuit forming face is made to be easily observed from a reverse face side of the semiconductor element, by forming the semiconductor element into a thin film by polishing a reverse face (step ST2). Then, the circuit forming face of the semiconductor element 1 is observed (step ST3) and emission-analyzed spectrometrically (step ST4) to estimate the troubled portion. After estimating the troubled portion, the semiconductor element is repacked (step ST5). A very slight potential difference and a current value are measured thereafter in the estimated troubled portion of the analogue circuit, by a probe needle or the like, to narrow the troubled portion up to a level of transistor (step ST6).


Inventors:
KONDO TETSUYA
KONDO TADASHI
Application Number:
JP2004258635A
Publication Date:
September 29, 2005
Filing Date:
September 06, 2004
Export Citation:
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Assignee:
SONY CORP
International Classes:
G01R31/302; (IPC1-7): G01R31/302
Attorney, Agent or Firm:
Takahisa Sato