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Title:
APPARATUS AND METHOD FOR ADJUSTING PERFORMANCE CHARACTERISTICS OF PROGRAMMABLE LOGIC DEVICE
Document Type and Number:
Japanese Patent JP2012075168
Kind Code:
A
Abstract:

To adjust supply voltage and power consumption.

A programmable logic device (PLD) includes a circuit that controls a supply voltage of at least a portion of a circuit within the PLD (such as a block, a sub-block, or a region). The circuit filters noise within the PLD. Controlling the supply voltage allows trade off of various performance characteristics, such as speed and power consumption.


Inventors:
SHUMARAYEV SERGEY Y
RAKESH PATEL
Application Number:
JP2011256197A
Publication Date:
April 12, 2012
Filing Date:
November 24, 2011
Export Citation:
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Assignee:
ALTERA CORP
International Classes:
H03K19/173; H03K19/177
Domestic Patent References:
JPH09162720A1997-06-20
JPH11195967A1999-07-21
JP2002543513A2002-12-17
JPH09204242A1997-08-05
JPH08162884A1996-06-21
JP2001345423A2001-12-14
JP2004297166A2004-10-21
JP2005503668A2005-02-03
JPH06163823A1994-06-10
JPH10144870A1998-05-29
JPH0950453A1997-02-18
JP2004070805A2004-03-04
JP2001332695A2001-11-30
Foreign References:
WO1998058382A11998-12-23
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Natsuki Morishita