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Title:
APPARATUS AND METHOD FOR MANUFACTURE OF SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPH05121521
Kind Code:
A
Abstract:

PURPOSE: To easily and sufficiently control a piece of quality information in the unit of wafers by a method wherein sequential numbers in which wafers are cut off from a blank ingot are given to the wafers one by one as discrimination numbers of the wafers and the conveyance route during the manufacturing process of the wafers one by one is pursued and stored as a piece of wafer information.

CONSTITUTION: A silicon ingot is formed in a pulling-up process 1; after that, it is cut to wafers in a slicing process 2; wafer numbers are set in sequential numbers in which the wafers have been cut off. The cut wafers are stored in a conveyance jig one by one; they are recorded while groove Nos. of the conveyance jig, wafer Nos. and No. of the jig are made to correspond; they are informed to other processes via a computer network 8. Consequently, the discrimination of the wafers can be expressed as groove positions of the conveyance jig. In addition, the wafers can be discriminated in the unit of wafers even in a heat treatment process 3, a mirror-surface working process 4, a cleaning process 5 and an inspection process 6; the wafers can be controlled carefully without deteriorating their quality.


Inventors:
IWAKIRI EIJI
FUKUSHIMA SHINGO
TAKITANI YUKITAKA
Application Number:
JP28324191A
Publication Date:
May 18, 1993
Filing Date:
October 29, 1991
Export Citation:
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Assignee:
KOMATSU DENSHI KINZOKU KK
KOMATSU MFG CO LTD
International Classes:
H01L21/02; H01L21/00; H01L21/673; H01L21/677; H01L23/544; (IPC1-7): H01L21/02; H01L21/68
Domestic Patent References:
JPS63220513A1988-09-13
JPH02208949A1990-08-20
JPH02307266A1990-12-20
JPS5850750A1983-03-25
Attorney, Agent or Firm:
Kimura Takahisa