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Title:
APPARATUS FOR POLISHING SEMICONDUCTOR WAFER AND ITS METHOD
Document Type and Number:
Japanese Patent JP3453356
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To provide a polishing apparatus capable of performing a highly- accurate polishing work on a circumferential portion and notch portion of a semiconductor wafer and its method.
SOLUTION: The polishing apparatus A is equipped with a mechanism in which a stacked work 3 of the semiconductor wafer 2 is loaded on a turntable 21 in a polishing liquid bath 1 filled with a polishing slurry liquid, and a polishing roller 71 having a circumferential surface wound with a polishing pad 73 consisting of a soft elastic material rotates facing with a circumferential portion 2a of the semiconductor wafer 2. The polishing apparatus B is equipped with mechanism for placing the stacked work 3 of a semiconductor wafer which is stacked with its notch portion 2b matched, and a polishing belt 98 having the same sectional shape as that of the notch portion 2b rotates facing the notch portion. The polishing pad and the polishing belt are made of a soft elastic material of 7 (Hs)-40 (Hs).


Inventors:
Teruyuki Nakano
Yasuhiro Ozawa
Hitoshi Tanbo
Manabu Nakahashi
Application Number:
JP2000397782A
Publication Date:
October 06, 2003
Filing Date:
December 27, 2000
Export Citation:
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Assignee:
Ishii Co., Ltd.
International Classes:
B24B9/00; B24B7/24; B24B9/06; B24B37/00; B24B37/20; B24B37/24; H01L21/304; (IPC1-7): H01L21/304; B24B9/00; B24B37/00
Domestic Patent References:
JP10277931A
JP7100737A
JP11254309A
JP200082688A
Attorney, Agent or Firm:
Shogo Ebara (3 outside)