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Patent Searching and Data


Title:
ARBITER CIRCUIT AND ARBITER SYSTEM
Document Type and Number:
Japanese Patent JP2000353155
Kind Code:
A
Abstract:

To obtain the arbiter circuit which uses a superconductive pulse logic circuit by allowing a local oscillator to output timing pulses representing the timing of the output of data of a request signal accumulated by a data holding circuit.

A pulse holding circuit group 101 which holds data is equipped with three pulse holding circuits 101a, 101b, and 101c. The local oscillator 102 has three output terminals, which are connected to timing terminals T of the three pulse holding circuits 101a, 101b, and 10c. Then the local oscillator 102 outputs timing pulses representing the timing of the output of data pulses of request signals accumulated by the pulse holding circuits 101a to 101c. Consequently, the arbiter circuit which uses the superconductive pulse logic circuit can be obtained.


Inventors:
YOROZU SHINICHI
Application Number:
JP16325599A
Publication Date:
December 19, 2000
Filing Date:
June 10, 1999
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F15/16; G06F15/177; H03K5/15; (IPC1-7): G06F15/177
Attorney, Agent or Firm:
Kihei Watanabe