To remove the influece of parasitic capacitance with respect to a comparator to be used to stop a timer in an arithmetic circuit for converting input voltage into a logarithmic scale time by a timer consisting of an RC circuit and for attaining the operations of multiplication, division and power by the use of addition, subtractin, multiplication and division in a logarithmic space.

An input capacitance C1 is connected to an inverter circuit INV in a comparator, a pair of switches SW1, SW2 are connected in parallel with the capacitor C1, a reference voltage Vo is impressed to one switch SW1, and an input voltage Vin is impressed to the other switch SW2. The output and input of the inverter circuit INV are mutually connected through a switch SW3, and at the time of connecting the reference voltage Vo, the switch SW3 is opened, the capacitance C1 is charged with the reference voltage Vo, and then input voltage Vin is impressed to the capacitance C1 to execute comparison based on the reference voltage Vo.