PURPOSE: To improve the arithmetic speed by controlling a count operation of an up-down counter, and stopping the count operation of the up-down counter by an output from a comparing means, when the count value becomes equal to the maximum value or the minimum value.

CONSTITUTION: A count value of an up-down counter 21 is given to a comparing means, and also, to this comparing means, the maximum value being the upper limit value at the time when the counter 21 executes a count operation, and the minimum value being the lower limit value are given from a maximum value register 22, and a minimum value register 23, respectively. The comparing means 24, 25 compare the count value of the up-down counter 21, and the maximum value and the minimum value, respectively, and when the count value has become equal to the maximum value or the minimum value, an output is led out to a control means 28, and the count operation of the up-down counter 21 is stopped. In such a way, an arithmetic processing speed when an input signal such as an acoustic signal, etc., is brought to an arithmetic processing successively as time elapses can be improved.