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Title:
ARITHMETIC CONTROLLING SYSTEM OF DIGITAL DIFFERENTIAL ANALYZER
Document Type and Number:
Japanese Patent JPS5884346
Kind Code:
A
Abstract:

PURPOSE: To eliminate an arithmetic error which is caused when interlocking two digital differential amalizers DDA to each other, by applying the output of the arithmetic control signal obtained through the decoding within one DDA to the other DDA in case the arithmetic control is given to plural DDAs through a digital computer, etc.

CONSTITUTION: The arithmetic control selection signal is fed to a data bus 2 from a digital computer 1, and then decoded through the decoding parts 3 and 7 of the two DDAs. Then an indication is given to the selectors 12 and 17 to select whether the own arithmetic control signal or the arithmetic control input signal given from another DDA. Then, the arithmetic control signals 5 and 13 given from the selectors 12 and 17 are fed to the arithmetic parts 4 and 9 of the DDAs. Thus, the parts 4 and 9 are actuated with the arithmetic control signal sent from a decoder 3 or 7.


Inventors:
HIBINO KATSUHIKO
Application Number:
JP18224881A
Publication Date:
May 20, 1983
Filing Date:
November 16, 1981
Export Citation:
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Assignee:
HITACHI ELECTRONICS
International Classes:
G06F7/64; (IPC1-7): G06F7/64
Attorney, Agent or Firm:
Toshiyuki Usuda



 
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