To efficiently perform product sum operation of a plurality of calculated values.
An arithmetic unit is provided with; a product sum circuit array 1 which performs product sum arithmetic operation including multiplication and accumulation of calculated values expressed in voltage values; voltage setting circuit blocks 2 and 3 which set predetermined voltage values respectively; an input circuit block 5 which changes and inputs combination of voltage values into the product sum circuit array 1; a switch circuit block 4 which switches connection of conductors for inputting voltage values set by voltage setting circuit blocks 2 and 3 into the input circuit block 5; a sorting circuit 7 which sorts addresses of calculated values in descending order or ascending order of calculated values; a decoder 8 which decodes addresses and inputs into the switch circuit block 4; and an output circuit block 6 which provides digital output of the calculation result by the product sum circuit array 1.
COPYRIGHT: (C)2007,JPO&INPIT
Takashi Morie
| JP2005122465A | ||||
| JP2005122466A | ||||
| JP2004538582A |
Sogo Kuroiwa