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Title:
演算処理装置、演算処理方法及びプログラム
Document Type and Number:
Japanese Patent JP6964969
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To solve a problem that there is the possibility that if a plurality of feature surfaces are simply assigned to a plurality of arithmetic circuits for parallel computing, then more data are stored in a memory of each arithmetic circuit in a duplicated manner.SOLUTION: An arithmetic processing apparatus is characterized by having a first holding means for holding a plurality of feature data of a reference side among a plurality of feature data in a hierarchical arithmetic processing, a plurality of computing circuits for respectively computing, in parallel, a plurality of feature data of an output side with reference to a part of feature data of the above plurality of feature data of the reference side, a plurality of second holding means which correspond to the respective plurality of computing circuits and which hold a plurality of feature data that said computing circuits refer to for calculating a plurality of feature data, and an allocation means for selecting, among a plurality of candidates for feature data to be allocated to the respective computing circuits, a single candidate which reduces the number of feature data overlappingly held by the plurality of second holding means.SELECTED DRAWING: Figure 1

Inventors:
Yusuke Taniuchi
Masami Kato
Takahisa Yamamoto
Osamu Nomura
Yoshinori Ito
Katsuhiko Mori
Application Number:
JP2016193553A
Publication Date:
November 10, 2021
Filing Date:
September 30, 2016
Export Citation:
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Assignee:
Canon Inc
International Classes:
G06N3/02; G06F9/38
Domestic Patent References:
JP2001188767A
JP2013114538A
JP2010211496A
Attorney, Agent or Firm:
Takuma Abe
Sogo Kuroiwa