PURPOSE: To shorten an operation time by directly writing the output of an arithmetic logical computing element in a RAM, and in the case of multiplication, division and binary number/BCD number conversion, inhibiting the repeated reading/writing of data from/in the RAM in an arithmetic cycle.

CONSTITUTION: At the time of executing arithmetic logical operation, a multiplexer 14 selects the data of a 2nd latch 13, inputs arithmetic data from a two-port RAM 11 to the arithmetic logical computing element 15 and directly stores the result in the RAM 11. When executing multiplication, division and binary number/BCD number conversion, a multiplier, a divided and a number to be converted, or zero are set up in a 2nd register QRG 17 and the multiplexer 14 selects the data of a 1st register YRG 22. Then arithmetic processing is executed by the loop of register 22-multiplexer 14-computing element 15-1st shifter 16-register 22, the data of the registers 22, 17 are selected by the multiplexer 14 and the final operation result is stored in the RAM 1. Consequently, the operation time can be shortened as a whole.