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Title:
ARITHMETIC UNIT
Document Type and Number:
Japanese Patent JP2002245448
Kind Code:
A
Abstract:

To provide an arithmetic unit which performs a series of processes, such as inputting, decoding and outputting of compressed images and compressed sound data and has high throughput even though the arithmetic unit is not operated in a high frequency.

This arithmetic device has first and second control/storage parts 506 and 507 for respectively storing a microprogram, a first program counter 504 for designating a first read address in the first control/storage part, a second program counter 505 for designating a second read address, a selector 508 for selecting either the first read address or the second read address and outputting the selected read address to the second control/storage part, and an execution unit 501 for performing an arithmetic by microprogram control by the first and second control/storage parts.


Inventors:
YOSHIOKA KOSUKE
HIRAI MAKOTO
KIYOHARA TOKUZO
KIMURA KOZO
Application Number:
JP2001321186A
Publication Date:
August 30, 2002
Filing Date:
April 06, 1998
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F9/38; G06F9/28; G06T1/20; G10L19/02; H03M7/30; H04N19/20; H04N19/42; H04N19/423; H04N19/60; H04N19/625; H04N19/85; (IPC1-7): G06T1/20; G06F9/28; G06F9/38; G10L19/00; H03M7/30
Attorney, Agent or Firm:
Nakajima Shiro