Title:
ARRAY OF CHIP HAVING BEVELED STRUCTURE
Document Type and Number:
Japanese Patent JPH10100475
Kind Code:
A
Abstract:
To protect one or both chip mounted on the surface of a board against damage due to inadvertent contact with a curved back-cut part.
In an array of abutting silicon chips 12a, 12b, 12c being employed in a full page photosensitive scanner, an ink jet head or an LED exposing piece where a planar beveled part 20 is formed in the vicinity of boundary between adjacent chips 12a, 12c, the chip 12b is protected against damage when it is assembled into the chip array because of the planarity of the beveled part 20.
Inventors:
QUINN KRAIG A
ORMOND BRIAN T
ORMOND BRIAN T
Application Number:
JP17695597A
Publication Date:
April 21, 1998
Filing Date:
July 02, 1997
Export Citation:
Assignee:
XEROX CORP
International Classes:
B41J2/44; B41J2/155; B41J2/45; B41J2/455; H01L21/98; H01L25/065; H01L25/075; H04N1/034; H01L29/06; (IPC1-7): B41J2/44; B41J2/45; B41J2/455
Attorney, Agent or Firm:
Kenji Yoshida (2 outside)