To prevent the characteristic variance caused by the temperature change in a working mode even though the primary circuit part is equal to an analog circuit.

An arbitration circuit 11 functions only when both edge detection signal and delayed edge detection signal of an ASK modulated signal that undergone the half-wave rectification are set at logical value '1'. A counter circuit 12 outputs the count value to show the frequency of detection signals appearing within a fixed time. An upper-lower limit detection circuit 13 outputs both upper and lower limit detection signals to the circuit 11 when the number of carrier pulses reaches its upper and lower limit value per bit of the deceived data respectively in order to prevent the malfunction of the circuit 12. A comparator 14 compares the count value of the circuit 12 with its threshold. Then a JK type F/F circuit 15 is set at logical value '1' or '0' according to the comparison result of the comparator 14 and outputs the demodulated data.