Title:
ASSEMBLING OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59208736
Kind Code:
A
Abstract:
PURPOSE:To satisfactorily connect the end point of lead wire and chip by fixing a semiconductor chip at the lower part of vessel divided into upper and lower sections, allowing the lead wire to run through the specified position at the upper part of vessel and then fixing them and connecting the end point of lead wire to the electrode on the chip. CONSTITUTION:A chip 2 on the bottom plate 1 coupled to the side wall 5 by welding is easily brazed by the automatic furnace assembling with a carbon jig. Meanwhile, the upper cover 6 is made of an insulator to which a lead frame having a lead 4 is previously bonded or fixed by the brazing or molding. A solder plate 9, for example, is placed on the electrode of this chip 2, the upper cover 6 to which the lead 4 is fixed is placed and thereafter the end point of lead 4 is connected to the chip 2 and electrode by the method such as allowing it to run in the automatic furnace. In this case, the lead 4 is short within the vessel and therefore the end point of lead is less deviated. In case a ceramic upper case 6 is used, the contact area with the side wall 5 is metallized and the upper cover 6 and side wall 5 are brazed simultaneously.
Inventors:
SHIGEKANE TOSHIO
Application Number:
JP8334383A
Publication Date:
November 27, 1984
Filing Date:
May 12, 1983
Export Citation:
Assignee:
FUJI ELECTRIC CO LTD
International Classes:
H01L21/60; H01L23/48; (IPC1-7): H01L23/48
Domestic Patent References:
| JPS5159268A | 1976-05-24 | |||
| JPS5198960A | 1976-08-31 | |||
| JPS5717156A | 1982-01-28 |
Attorney, Agent or Firm:
Iwao Yamaguchi