PURPOSE: To prevent a short input signal such as noise from being propagated to an inner circuit by constituting the circuit of a delay circuit, a NAND gate applied with output and input signals of this circuit, a NOR gate, an inverter circuit and an RS filp-flop.

CONSTITUTION: An asynchronous signal inputted externally and an asynchronous signal via a delay circuit 1 are fed respectively to NAND and NOR circuits 2, 3. Then the output of the circuit 2 via an inverter circuit 3 and an output of the circuit 3 are fed respectively to set reset terminals S, R of an RS FF 10 and a signal Q synchronized to a clock is outputted from the FF 10. In such a case, when the noise, etc., changing to an H level in a shorter time than a delay time of the circuit 1 is applied, the output of the circuit 4 is changed and sent to a next stage, and the output of the circuit 3 is not changed, the propagation to the internal circuit is prevented and a synchronous output not susceptible to noise is outputted.