ATM CONTROLLER AND ATM COMMUNICATION CONTROLLER

Title:

ATM CONTROLLER AND ATM COMMUNICATION CONTROLLER

Document Type and Number:

Japanese Patent JPH10257068

Kind Code:

A

Abstract:

To provide an ATM controller capable of reducing number of entry of a CAM and dealing with a large number of VC.

An ATM controller is provided with a CAM 77 to convert a VPI/VCI of a received cell into a VC-ID at high speed when the cell is received. Reception time is stored in the CAM 77 by making correspondence to the VPI/VCI. A comparison circuit 77-5 judges whether or not the VPI/VCI in a header of the received cell is registered in the CAM when the cell is received, if the VPI/VCI is not registered, the entry of the VPI/VCI with the oldest reception time is discarded and the VPI/VCI and the VC-ID of the received cell are newly registered in the CAM by an MPU 100. The VC-ID corresponding to the VPI/VCI in the header of the received cell is outputted by the CAM 77.

Inventors:

EGUCHI KENTETSU
YOKOYAMA TATSUYA
MIZUTANI MIKA
TAKADA OSAMU
HATA EIZO
SUZUKI KOJI

Application Number:

JP6101997A

Publication Date:

September 25, 1998

Filing Date:

March 14, 1997

Export Citation:

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Assignee:

HITACHI LTD
HITACHI CHIYOU LSI SYS KK

International Classes:

H04Q3/00; H04L12/28; (IPC1-7): H04L12/28; H04Q3/00

Attorney, Agent or Firm:

Kazuko Tomita

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