Title:
自動調整回路、フィルタ回路、および周波数特性自動調整方法
Document Type and Number:
Japanese Patent JP4844760
Kind Code:
B2
Abstract:
An automatic adjustment circuit comprises a replica (1) constituted of either a circuit block of a portion of a filter body (3) or a combination of the circuit block, and fed with a reference signal (2) from the outside, for outputting signals having a phase delays of 90 degrees and 180 degrees with respect to the reference signal (2), and an integrating comparator (4) fed at its input terminal with an output signal, as having a phase delay of 180 degrees, of the replica (1) and the reference signal (2), and at its clock terminal with an output signal, as having a phase delay of 90 degrees, of the replica (1), and having an output terminal connected with a capacity (C1) and a frequency characteristic adjusting terminal of the replica (1). The automatic adjusting circuit is characterized in that the integrating action of the integrating comparator (4) is performed across the two high/low states of the input signal.
More Like This:
| JPS59215 | LOW-PASS FILTER |
| WO/2001/026339 | BAND PASS AND NOTCH FILTERS FOR ECHO REDUCTION WITH LESS PHASE DISTORTION |
Inventors:
Shinichi Hori
Application Number:
JP2007547864A
Publication Date:
December 28, 2011
Filing Date:
October 10, 2006
Export Citation:
Assignee:
NEC
International Classes:
H03H11/04
Domestic Patent References:
| JP2003060485A | 2003-02-28 | |||
| JPH05291946A | 1993-11-05 | |||
| JPH0750555A | 1995-02-21 | |||
| JP2003188683A | 2003-07-04 | |||
| JP2003124783A | 2003-04-25 | |||
| JP2004236051A | 2004-08-19 |
Attorney, Agent or Firm:
Akio Miyazaki
Ishibashi Masayuki
Masaaki Ogata
Ishibashi Masayuki
Masaaki Ogata