Title:
AUTOMATIC EQUALIZATION SYSTEM
Document Type and Number:
Japanese Patent JP3428376
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a stable automatic equalization system capable of an necessitating the adjustment of a signal processing circuit, by respectively constituting a gain control loop, a phase locked loop and a waveform equalization loop with digital circuits.
SOLUTION: A first temporary discrimination circuit 13 supplies a temporary discrimination result to a first error operation means 14. At this time, when the temporary result is +1, the means 14 switch selects an output of a subtrater 141 from a switch circuit 144, and when -1, the means 14 switch selects the output of an inverter 142. The switch circuit 144 supplies a level difference signal between the temporary discrimination result and a really supplied digital signal to a D/A converter 15 as an error signal. Since the +1 or -1 of a most provable digital information signal is detected, and the phase error error operation of the information signal is performed based on this, the matter that the phase of the digital information signal is locked to an erroneous phase is eliminated to be converged to a precise phase.
Inventors:
Junichiro Tonami
Takashi Kiyofuji
Takashi Kiyofuji
Application Number:
JP15152997A
Publication Date:
July 22, 2003
Filing Date:
May 26, 1997
Export Citation:
Assignee:
Victor Company of Japan Ltd.
International Classes:
H04N7/173; G06F11/10; G11B20/10; G11B20/14; G11B20/18; H03L7/091; H03M13/03; H03M13/13; H03M13/23; H03M13/29; H04B7/005; H04B7/24; H04B7/26; H04B14/00; H04H60/72; H04J13/16; H04L25/03; H04L25/497; H04N7/26; H04N7/52; H04W4/06; H04W4/12; H04W4/14; H04W8/02; H04W8/16; H04W8/20; H04W24/00; H04W40/22; H04W76/02; H04W80/06; H04W84/12; H04W88/02; G11B20/22; H04L1/00; H04W8/26; H04W72/04; (IPC1-7): G11B20/14; G11B20/10
Domestic Patent References:
| JP9219068A |