PURPOSE: To secure a quick correction to the correct value in case the tuning voltage has a shift by giving an automatic switching to the correction velocity, i.e., the frequency of the clock signal to a low level after a fixed time.

CONSTITUTION: Clock switching circuit 55 switches the frequency of the clock signal given from clock signal generation circuit to a low level in a fixed time after the channel is received through operation of channel selection switch 53. As a result, the changing velocity of the tuning voltage is retarded and then changed toward the correct value. And the tuning voltage stops its changing when it passes through the correct value via the answer delay of the signal given from AFT decision circuit 44, and then changes toward the correct value again. In this case, circuit 55 is triggered by the stop signal generated from circuit 44 to switch the frequency of the clock signal to a lower level after a fixed time. After this, these action are repeated to finally secure the correction to the correct value for the tuning voltage.