Title:
AUTOMATIC GAIN CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JP3120737
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To realize high speed and stable automatic gain control with a simple circuit over a wide dynamic range.
SOLUTION: The control circuit is made up of a gain variable amplifier 101, a demodulator 102, an A/D converter 103, an amplitude detection circuit 104, an object amplitude generating circuit 105, a subtractor 106, a sequence control counter 107, a counter 108, a multiplexer 109 and a D/A converter 110. The subtractor 106 takes a difference between an amplitude signal Sampl and an object amplitude signal Stampl to provide an output of an amplitude error signal Seampl. The counter 108 integrates this signal over a prescribed length of time and provides an output of a level discrimination signal SLVL. The multiplexer 109 selects among N-sets of gains at an interval of 1/N of the entire gain width, sets the selected gain and outputs a step preset signal Ssp. The step reset signal Ssp is outputted from the D/A converter 110 as a gain control voltage Vgc to control the gain variable amplifier 101.
Inventors:
Yoshikazu Kakura
Tomoki Ohsawa
Tomoki Ohsawa
Application Number:
JP22196696A
Publication Date:
December 25, 2000
Filing Date:
August 23, 1996
Export Citation:
Assignee:
NEC
International Classes:
H03G3/20; H03G3/30; H04L27/38; (IPC1-7): H03G3/20; H03G3/30
Domestic Patent References:
| JP7235847A | ||||
| JP4267613A | ||||
| JP4117011A | ||||
| JP61111008A | ||||
| JP60186131A | ||||
| JP60187115A |
Attorney, Agent or Firm:
Hiroo Suzuki