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Patent Searching and Data


Title:
AUTOMATIC NODE SEPARATOR
Document Type and Number:
Japanese Patent JPH06141031
Kind Code:
A
Abstract:

PURPOSE: To prevent an information signal with a level lower than a regulated level due to a reflected wave and overshoot from being received erroneously by integrating the level of the information signal over the time, and comparing it with a prescribed reference level.

CONSTITUTION: A signal extraction part 19, when receiving the information signal from a terminal 1, outputs it to an integration circuit 12 via a zero cross detecting part 11. The circuit 12 integrates the level of the information signal extending over the time width of zero cross, and outputs a result to an integration level comparison part 14. The comparison part 14 compares it with the reference level from an integration reference level output part 13, and outputs a high level when the absolute value of the output level of the circuit 12 is larger than the reference level, and a low level when the former shows the level other than that. Thence, a reset signal generating part 6, when receiving the high level, resets a timer 7, and outputs the output from the extraction part 19 to a repeater part 9 as it is. When the generating part 6 receives the low level, the timer 7 blocks a signal from the extraction part 19 by a node separation part 8 when a prescribed number is counted, and no signal is outputted to the repeater part 9.


Inventors:
NAKAMUTA TATSUYA
Application Number:
JP28972492A
Publication Date:
May 20, 1994
Filing Date:
October 28, 1992
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F13/00; H04L12/28; H04Q3/52; (IPC1-7): H04L12/28; G06F13/00
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)