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Title:
BARREL SHIFTER CIRCUIT
Document Type and Number:
Japanese Patent JPH0713736
Kind Code:
A
Abstract:

PURPOSE: To reduce the area occupied by a barrel shifter in a semiconductor integrated circuit by providing a shift circuit consisting of a shift register that shifts the input data by a shift clock and a latch circuit which holds the output of the shift circuit.

CONSTITUTION: A barrel shifter circuit consists of an oscillator circuit 104 which starts oscillations with reception of a shift instruction signal 108, stops the oscillations with reception of a comparison coincidence signal 112, and outputs a shift clock 109, a counter circuit 105 which counts the number of pulses of the clock 109 and output a counter signal 113, a comparator circuit 106 which compares the signal 113 with a shift extent designating signal 106 and outputs the signal 112, a shift circuit 102 which shifts a barrel shifter input signal 110 by the clock 109 and outputs shift circuit output signal 114, and a latch circuit 103 which latches the output signal 114 of the circuit 102 by the signal 112 and outputs a barrel shifter output signal 111.


Inventors:
ISHIBASHI TAKASHI
Application Number:
JP14415193A
Publication Date:
January 17, 1995
Filing Date:
June 16, 1993
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
G06F5/01; G06F7/00; (IPC1-7): G06F5/01; G06F7/00
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)