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Title:
BIAS CIRCUIT
Document Type and Number:
Japanese Patent JP2010028204
Kind Code:
A
Abstract:

To provide a bias circuit capable of stabilization over a wide band.

The bias circuit includes: a main signal line 1 having the length of 1/2 wavelength to the fundamental waves of a prescribed frequency; a first signal line 2 connected to one end of the main signal line 1 and provided with the length of 1/4 wavelength to the fundamental waves; a first capacitor 3 whose one end is connected to the side of the counter main signal line 1 of the first signal line 2 and other end is grounded; a first bias terminal 4 provided between the first signal line 2 and the first capacitor 3; a second signal line 5 connected to the other end of the main signal line 1 and provided with the length of 1/4 wavelength to the fundamental waves; a second capacitor 6 whose one end is connected to the side of the counter main signal line 1 of the second signal line 5 and other end is grounded; and a second bias terminal 7 provided between the second signal line 5 and the second capacitor 6.


Inventors:
TOMIYAMA KENICHI
INAMI KAZUYOSHI
Application Number:
JP2008183851A
Publication Date:
February 04, 2010
Filing Date:
July 15, 2008
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01P1/00
Attorney, Agent or Firm:
Michiharu Soga
Hidetoshi Furukawa
Suzuki Kenchi
Kajinami order
Kazuhiro Oyaku
Shunichi Ueda