PURPOSE: To remove the occurrence of abnormal phenomena such as oscillation of a semiconductor element etc. by constituting a DC bias line to attain a terminal of resistance in a low frequency band other than a signal frequency.
CONSTITUTION: A lead wire from a through type porcelain condenser 4 that applies voltage of -VG to the gate terminal of an FET1 to a 1/4 wavelength resonator 3 is covered with a ferrite core of large magnetic loss. Utilizing the fact that a ferrite element acts as an absorbing body in low frequency, impedance looked from a connecting point 11 to the through type condenser 4 side is made to be regarded as a terminal of resistance nearly conformable to impedance looking the FET1 side in frequency other than a signal frequency. Constitution is the same in the case where voltage of +VD is applied to the drain terminal of the FET1. Thus, abnormal phenomena such as the occurrence of oscillation of a semiconductor element such as an FET which is generally high gain in low frequency band can be prevented.
JPS541698B1 | 1979-01-27 | |||
JPS4838198A | 1973-06-05 | |||
JP57140713B |
Next Patent: TEMPERATURE COMPENSATING CIRCUIT