Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
BIAS VOLTAGE DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPS6087515
Kind Code:
A
Abstract:

PURPOSE: To minimize the distortion output by adding a storage start control circuit between an A/D converter storage circuit and a storage start signal generating source and coupling a storage set signal generating source to the A/D converter storage circuit.

CONSTITUTION: When a digital value is inputted through a bias digital signal source 2, it is converted into an analog signal at a D/A converter 4, the converted signal is superimposed on a signal inputted from a measuring reference signal source 1 at an input circuit 5, and the result is inputted to an analog signal delay device 6. The distortion output is extracted from the analog signal delay device 6 and converted into a DC voltage at an output conversion circuit 7, the DC voltage is converted into a digital value at an A/D converter 8 by the signal of an A/D conversion start signal generation source 9, it is compared as the distortion output with a preceding signal stored in an A/D conversion storage circuit 10 at a comparator circuit 12 and also inputted to the A/D conversion storage circuit 10, the preceding signal is cancelled by a signal from the storage set generating source 14 and the distortion output is stored therein.


Inventors:
NAKAO REIJI
HIRAKAWA KENJI
USUI SHIYUNICHI
Application Number:
JP19568983A
Publication Date:
May 17, 1985
Filing Date:
October 19, 1983
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
G10K15/12; G10K15/00; H03H11/26; (IPC1-7): G10K15/00; H03H11/26
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
Previous Patent: Operation instrument implement

Next Patent: EQUALIZER