PURPOSE: To have flexible correspondence to an extension of an address space due to an increase of peripheral devices, by providing settable upper and lower addresses by a program given from a CPU.
CONSTITUTION: A CPU15 is connected to peripheral devices such as an input device I/O and a bidirectional bus extending device 10 via a common bus 16. The device 10 consists of an upper limit address register 21, a lower limit address register 22, an upper limit address comparator 23, a lower limit address comparator 24, and an OR gate 25. The registers 21 and 22 can be set freely from the CPU15 by a program via a common bus. When the addresses contained between the addresses set at both registers 21 and 22 are designated through an address bus, an extended common bus 17 is electrically connected to the CPU15 to control a peripheral device corresponding to a designated address. Then the data is transmitted and received.
SUZUKI NORIYUKI
HAYASHI HIDENORI
