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Patent Searching and Data


Title:
BINARY-CODED OUTPUT GENERATING SYSTEM
Document Type and Number:
Japanese Patent JPS58206978
Kind Code:
A
Abstract:

PURPOSE: To obtain a binary-coded internal voltage of a sample with high accuracy and at a high speed, by calculating comparison reference voltage from output voltage obtained from an energy analyzer when analysis voltage of a low level and a high level is applied.

CONSTITUTION: A measuring point scanned by an electronic beam EB is a standard measuring point on an integrated circuit 2, and a switch 5 connects an analysis grid voltage source 6 first, and subsequently an analysis grid voltage source 7 to an analysis grid 3. During that time, a switch 10 is connected to an output contact 11. Subsequently, when an analysis grid voltage source 8 is connected to the analysis grid 3 through a switch 5 and voltage applied to the analysis grid 3 is set to V0, voltage outputted from an energy analyzer 1 becomes SM0 or SM5 in accordance with whether internal voltage of the integrated circuit 2 is, for instance, "0" volt or 5 volts. A value showing it is supplied to a comparator 13 through the switch 10.


Inventors:
ITOU AKIO
GOTOU YOSHIAKI
Application Number:
JP9070582A
Publication Date:
December 02, 1983
Filing Date:
May 28, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G01N23/225; G01R19/155; G01R31/302; H01J37/244; H01J37/28; (IPC1-7): G01R19/165
Attorney, Agent or Firm:
Koshiro Matsuoka