Title:
2進数カウンタ
Document Type and Number:
Japanese Patent JP4157940
Kind Code:
B2
Abstract:
The arrangement reads out a memory word, places it in working memory, thereby carrying out inverse rearrangement of permutation bits, uses an inverse bi-jective imaging function (permutation) on the permutation bits, decrements or increments the data word, uses a bi-jective imaging function, rearranges the permutation bits, checks if each memory word is different from the stored word and only stores each different word back in non-volatile memory. The arrangement has a counter and a working memory, whereby a data word in the non-volatile memory is stored in at least two memory words. The arrangement for incrementing a data word stored in the non-volatile memory reads out the memory word from the memory, places it in the working memory, thereby carrying out an inverse rearrangement of k permutation bits of the data word, uses an inverse bi-jective imaging function (permutation) on the permutation bits, decrements or increments the data word, uses a bi-jective imaging function, carries out a rearrangement on the permutation bits and checks whether each memory word is different from the stored word and only stores each word that is different back in the non-volatile memory.
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Inventors:
Frank, B
Application Number:
JP2002261861A
Publication Date:
October 01, 2008
Filing Date:
September 06, 2002
Export Citation:
Assignee:
NXP B.V.
International Classes:
G06F12/16; B60R25/04; B60R25/24; G07C9/00; G11C29/04; H03K21/00; H03K21/40; H03M13/27
Domestic Patent References:
| JP4155697A | ||||
| JP2002351738A | ||||
| JP63094716A | ||||
| JP8016482A |
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Takeshi Sekine
Takahashi
Hidetoshi Tachibana
Takeshi Sekine
Takahashi