PURPOSE: To enable quantitative determination of distribution characteristic of the number of bit errors in a block, by measuring the number of errors per block for blocks with a fixed sample to perform a statistic processing.
CONSTITUTION: A frame counter 102 counts clocks 101 to output frame pulses 103 per block as preset and a delay circuit 104 outputs a clear pulse 105 delayed by one time slot from the frame pulses. On the other hand, an error counter 202 counts and outputs error pulses 201, for example, by the clocks and a block counter 204 adds up errors in one frame to output the number of errors within one block. Then, a CPU300 reads out an output of the block counter 204 and performs a statistic processing of the results thereby enabling the measuring of bit errors with a block as a unit, as set according to the block length in the error correction.
SAITO YOICHI
JPS5261407A | 1977-05-20 | |||
JPS56107117A | 1981-08-25 | |||
JPS58137708A | 1983-08-16 | |||
JPS61287346A | 1986-12-17 | |||
JPS5673938A | 1981-06-19 |