PURPOSE: To shorten measuring time by counting the number of clocks while a requested number of bit errors is counted, and computing a bit error rate at an arithmetic circuit.

CONSTITUTION: A bit error counter circuit 1 outputs the number of bit errors counted until a time when the number of bit error pulse signals to be counted arrives at a prescribed value to the arithmetic circuit 4, and simultaneously, outputs a stop signal to an AND circuit 2. The AND circuit 2 outputs the clock as it is while counting, and prohibits the output of the clock at a time when the stop signal is inputted. A clock counter circuit 3 counts the number of clocks outputted from the AND circuit 2, and outputs the number of clocks counted until then to the arithmetic circuit 4. The arithmetic circuit 4 performs division setting the number of bit errors as a numerator and the number of clocks as a denominator, and outputs the bit error rate. In such a manner, it is possible to reduce the counting of the number of clocks required for the measurement of the bit error rate with requested accuracy, and to shorten the measuring time.