PURPOSE: To obtain a regenerating clock with less jitter component by using a clock component extracted from a multi-value base band signal controlled so that 0 cross points are concentrated at a narrow range after passing through a delay circuit to regenerate the clock.

CONSTITUTION: For example, a four-value base band signal supplied to an input terminal 20 is delayed at a delay circuit 11 by a time of sum of signal processing times of a demodulator, regenerating device (not shown), logical circuit 18, and a digital/analog converter 17, and fed to an operational amplifier 12. On the other hand, zero cross points are concentrated to a range as narrow as possible at a logical circuit 18 by using a regenerated digital data, the collected four- value base band signals are detected at a detector 13, where the clock components are extracted. The extracted clock components are locked in phase with the output wave of a voltage controlled oscillator 16 of a phase locked loop comprising a phase comparator 14, loop filter 15 and the voltage controlled oscillator 16, and a regenerated clock is outputted from a terminal 21.