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Patent Searching and Data


Title:
BLOCK DIAGRAM ANALYSIS SYSTEM
Document Type and Number:
Japanese Patent JPH07244655
Kind Code:
A
Abstract:

PURPOSE: To stably calculate a block diagram wherein a fast-response element and a slow-response element are both present at a high speed.

CONSTITUTION: Data regarding the block diagram including algebraic arithmetic elements of addition, subtraction multiplication, division, etc., time-dependent dynamic elements such as integration, primary delay, arithmetic elements such as loop elements corresponding to an unknown number of an algebraic equation, etc., and connection data showing a flow of signals among the arithmetic elements are inputted from a block diagram data input part 24. An implicit solution method or explicit solution method is specified as a numerical calculating method for each dynamic element. Then the block diagram is decomposed by a decomposition part 26 into an implicit solution method subsystem and an explicit solution method subsystem. Once a determination part 28 determines calculation order, a time response part 30 calculates a time response regarding the block diagram. In concrete, the values of the dynamic elements of the explicit solution method subsystem are calculated in order by the explicit solution method such as a progressive Euler method and the calculated values are inputted to the implicit solution method subsystem to calculate the values of dynamic elements of the implicit solution subsystem by a backward Euler method or trapezoid method.


Inventors:
TANUMA MASAYA
Application Number:
JP3478594A
Publication Date:
September 19, 1995
Filing Date:
March 04, 1994
Export Citation:
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Assignee:
BABCOCK HITACHI KK
International Classes:
G05B21/02; G06F17/11; (IPC1-7): G06F17/11; G05B21/02
Attorney, Agent or Firm:
Unuma Tatsuyuki