Title:
BONDING DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3841718
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To prevent extensive occurrence of failure bonding in single point lead bonding process.
SOLUTION: In the inner lead bonding of a bonding object 5 where a chip 13 is held by a tape 16 having an inner lead 15 through an elastomer 14, a decision is made whether or not the height h2 of a bonding tool 4 when one inner lead 15 is grounded while pressing against a bonding pad 17 of the chip 13 exceeds the upper limit height h1 on the grounding face, i.e., the sum of thickness of the chip 13 and the inner lead 15 plus a specified allowance Δh. If the h2 exceeds the h1 due to presence of a foreign matter 300 on the back of a stage 6 and the chip 13, an alarm is delivered in order to inform occurrence of an error and bonding is interrupted thus preventing extensive occurrence of failure due to presence of a foreign matter 300, or the like.
Inventors:
Tatsuyuki Okubo
Keisuke Nadamoto
Keisuke Nadamoto
Application Number:
JP2002133913A
Publication Date:
November 01, 2006
Filing Date:
May 09, 2002
Export Citation:
Assignee:
Renesas Technology Corp.
Renesas Electronics East Japan Semiconductor Co., Ltd.
Renesas Electronics East Japan Semiconductor Co., Ltd.
International Classes:
H01L21/60; (IPC1-7): H01L21/60
Domestic Patent References:
| JP4206938A | ||||
| JP2065146A |
Attorney, Agent or Firm:
Yamato Tsutsui
Previous Patent: METHOD FOR REINFORCING HOLLOW TUBE IN OR AFTER CORROSION-PROOF CONSTRUCTION
Next Patent: CYLINDER TYPE MOUNT DEVICE WITH BRACKET
Next Patent: CYLINDER TYPE MOUNT DEVICE WITH BRACKET