Title:
BONDING METHOD AND ASSEMBLY MANUFACTURED ACCORDING THERETO
Document Type and Number:
Japanese Patent JPH09186199
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To realize solder bonding of a dense array made of fine contact pads. SOLUTION: Fine contact pads 26 included in a dense array made of pads formed on an electronic component have relatively thick solder layer 36. The layer 36 is treated to form a protective layer which is relatively easily cracked on the solder layer. The structure is brought into contact with the pad 26 of the pad array corresponding at the thermal compression bonding stage to be executed at the temperature lower than the melting point of the solder. At this stage, the fragile layer is collapsed. As a result, solid phase diffusion of the conductive material takes place via a crack in the collapsed layer, and electric connection between the pads corresponding to the two components realized.
More Like This:
JPS5662602 | PRODUCTION OF ALUMINUM PLATE |
Inventors:
RUSHIAN AASAA DEII ASARO
KIISU WAIN GUUTSUSEN
SANJII PAAKU FUI
BETEII JIYUE TOYUSEN
JIEEMUSU ARUBAATO UOOKAA
KIISU WAIN GUUTSUSEN
SANJII PAAKU FUI
BETEII JIYUE TOYUSEN
JIEEMUSU ARUBAATO UOOKAA
Application Number:
JP33669096A
Publication Date:
July 15, 1997
Filing Date:
December 17, 1996
Export Citation:
Assignee:
LUCENT TECHNOLOGIES INC (US)
International Classes:
B23K20/00; B23K20/08; B23K35/14; H01L21/60; H01L21/603; H01L23/485; H01L25/065; H01L25/07; H01L25/18; (IPC1-7): H01L21/60; B23K20/00; B23K35/14; H01L21/603; H01L25/065; H01L25/07; H01L25/18
Attorney, Agent or Firm:
Hirofumi Mimata
Previous Patent: SEMICONDUCTOR DEVICE, LSI CHIP AND PACKAGE STRUCTURE OF SEMICONDUCTOR DEVICE ON SUBSTRATE
Next Patent: FLIP-CHIP MOUNTING METHOD
Next Patent: FLIP-CHIP MOUNTING METHOD