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Patent Searching and Data


Title:
BUFFER CHECK IN DUPLEXING SYSTEM CIRCUIT
Document Type and Number:
Japanese Patent JPH0322728
Kind Code:
A
Abstract:

PURPOSE: To output normal data at all times without requiring a long time to decide a fault place by making a buffer check on an output side.

CONSTITUTION: Switching control is preformed by switching control circuits 13 and 23 so that, for example, the buffer output of a 0 system is led out as output data when comparing means 18 and 28 decide that the outputs of 0- system and 1-system pattern generating means 17 and 27 coincide with pattern outputs obtained by inserting the outputs into dummy time slots and passing them through 0-system and 1-system buffers 12 and 22 or the buffer output of an 1-system is led out as the output data. Therefore, the faults of output-side buffers 12 and 22 are also detected and normal data is outputted. Consequently, data processing of high quality is performed speedily without requiring a long time for the error processing.


Inventors:
MUTA KAZUTO
Application Number:
JP15792089A
Publication Date:
January 31, 1991
Filing Date:
June 20, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L1/22; (IPC1-7): H04L1/22
Attorney, Agent or Firm:
Sadaichi Igita