Title:
BUFFER CIRCUIT, CIRCUIT FOR DRIVING DISPLAY DEVICE AND DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP2005189680
Kind Code:
A
Abstract:
To reduce power consumption by lessening an area supplied to layout of an output stage of a drive signal by being applied to a flat display device by an organic EL element for instance, concerning a buffer circuit, a circuit for driving a display device and the display device.
Drain sources of a set of transistors TR1 and TR2 of a single channel are connected to be arranged between a positive side power source Vcc1 and a negative side power source Vss, and the set of the transistors TR1 and TR2 are driven by drive signals IN and INX complementarily changing a signal level.
More Like This:
Inventors:
YAMASHITA JUNICHI
UCHINO KATSUHIDE
UCHINO KATSUHIDE
Application Number:
JP2003433459A
Publication Date:
July 14, 2005
Filing Date:
December 26, 2003
Export Citation:
Assignee:
SONY CORP
International Classes:
H01L51/50; G09G3/20; G09G3/30; H03K17/16; H03K17/687; H05B33/14; (IPC1-7): G09G3/30; G09G3/20; H03K17/16; H03K17/687; H05B33/14
Domestic Patent References:
JP2002351429A | 2002-12-06 | |||
JPH0452684A | 1992-02-20 | |||
JPH05191256A | 1993-07-30 | |||
JP2002335153A | 2002-11-22 | |||
JPS5247365A | 1977-04-15 |
Attorney, Agent or Firm:
Shigenori Tada
Previous Patent: METHOD FOR REGENERATING GLASS SUBSTRATE FOR COLOR FILTER
Next Patent: IMAGE DISPLAY APPARATUS AND IMAGE DISPLAY CONTROL APPARATUS
Next Patent: IMAGE DISPLAY APPARATUS AND IMAGE DISPLAY CONTROL APPARATUS