Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
BUFFER MEMORY
Document Type and Number:
Japanese Patent JPS60138651
Kind Code:
A
Abstract:

PURPOSE: To increase a data processing speed and to increase easily the number of memories by converting independently the operation mechanism of a transaction memory into hardware.

CONSTITUTION: A buffer memory consists totallly of a buffer memory 10 exclusive for transaction, CPU11 and main memory 12. The actuation of the memory 10 which is separated from the general-purpose memory 12 is started through the memory 12, communication line l1, CPU11, communication line l2 and a buffer memory starting part 101. A starting program stored to the memory 12 is read by the CPU11 and sent to the part 101 to start the memory 10. The line l3 is used when the data of a buffer memory 103 at the side of the memory 12. In this case, the part 101 can be omitted.


Inventors:
YAMADA HIROKO
KIYOKANE YUKIO
Application Number:
JP24453583A
Publication Date:
July 23, 1985
Filing Date:
December 27, 1983
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
International Classes:
G06F12/08; G06F12/02; (IPC1-7): G06F12/08
Domestic Patent References:
JPS5470734A1979-06-06
JPS5854444A1983-03-31
JPS55118292A1980-09-11
JPS5960650A1984-04-06
Attorney, Agent or Firm:
Aoki Akira



 
Previous Patent: JPS60138650

Next Patent: MEMORY BANK SWITCHING SYSTEM