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Patent Searching and Data


Title:
BUILD-UP WIRING SUBSTRATE STRUCTURE
Document Type and Number:
Japanese Patent JP2003198162
Kind Code:
A
Abstract:

To prevent the data communication rate from lowering or the size of a substrate structure from increasing even if a build-up wiring substrate structure is employed and wiring is made from an element mounted on an upper layer wiring substrate to a connector.

One or more than one lower layer side connector 6 connected with a lower layer side circuit 4 and provided with a ground connection part 10 on the front side is secured to a lower layer wiring substrate 2, and one or more than one upper layer side connector 7 connected with an upper layer side circuit 5 and provided with a ground connection part 10 on the front side is secured to an upper layer wiring substrate 3 at a position adjacent to the lower layer side connector 6. A conductive securing metal 11 is secured to the front side of the lower layer side connector 6 and the upper layer side connector 7 such that it is connected with the ground connection part 10. As compared with a case where the upper layer side circuit 5 mounted on the upper layer wiring substrate 3 is wired to a connector secured to the layer wiring substrate 2, the wiring pattern length is shortened and the substrate structure is simplified.


Inventors:
SHIMOYAMA HIROMOCHI
NAGAYUMI KUNIMASA
TSUCHIYA HIROTERU
KATABIRA YASUHIRO
UESONO TAKANORI
KATSUUMI AKIHIRO
MATSUMOTO KOBO
Application Number:
JP2001399132A
Publication Date:
July 11, 2003
Filing Date:
December 28, 2001
Export Citation:
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Assignee:
TOSHIBA TEC KK
International Classes:
H05K1/14; H05K7/14; (IPC1-7): H05K7/14; H05K1/14
Attorney, Agent or Firm:
Masashi Kashiwagi (2 others)