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Title:
BUILT-IN PROGRAM DEVELOPMENT DEVICE FOR PARALLEL PROCESSOR
Document Type and Number:
Japanese Patent JP2009037295
Kind Code:
A
Abstract:

To provide a built-in program development device for parallel processors for calculating the number of loops under the consideration of the number of actual processing pixels in the case of automatically generating a program for operating parallel processors, and to provides a built-in program development method for parallel processors, a built-in program development program for parallel processors, and a recording medium with the built-in program development program for parallel processors stored therein.

A loop frequency calculation part 4 calculates and determines the loop frequency of parallel processing in a parallel program for operating parallel processors on the basis of the number of reference pixels or attributes of each processing stored in the information table of a block data part 6 and the number of parallel of the parallel processors and the number of images in the main scanning direction of image data.


Inventors:
KISHIKAWA JUN
Application Number:
JP2007198870A
Publication Date:
February 19, 2009
Filing Date:
July 31, 2007
Export Citation:
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Assignee:
RICOH KK
International Classes:
G06F9/44
Domestic Patent References:
JP2007080049A2007-03-29
JP2004206387A2004-07-22
Attorney, Agent or Firm:
Hideo Takino