Title:
BURST LIGHT RECEIVING CIRCUIT
Document Type and Number:
Japanese Patent JP3042608
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To attain accurate reproduction without deteriorating receiving sensitivity even just after a burst optical signal with large amplitude is inputted by automatically suppressing unnecessary offset components generated due to the tail currents of a PIN photodiode according to the amplitude of an input burst optical signal.
SOLUTION: An operating amplifier 8, mean value detecting circuit 9, peak value detecting circuit 10, and operating amplifier 11 generate a first control signal for removing DC offset currents from a current signal outputted by a PIN photodiode 1. The first control signal is inputted to an adding circuit 16, and synthesized with a second control signal for suppressing the fluctuation of an AC offset level so that the voltage value can be added, and inputted to a current signal controlling means 17. A buffer circuit 12, charging part 13, time constant controlling part 14, and operating amplifier 15 generate the second control signal for suppressing the offset level fluctuation due to the tail currents of the PIN photodiode 1.
Inventors:
Hiroki Yanagisawa
Application Number:
JP19714397A
Publication Date:
May 15, 2000
Filing Date:
July 23, 1997
Export Citation:
Assignee:
NEC
International Classes:
H01L31/10; H04B1/18; H04B10/07; H04B10/40; H04B10/50; H04B10/524; H04B10/60; H04B10/67; H04L25/06; (IPC1-7): H04B10/28; H01L31/10; H04B1/18; H04B10/04; H04B10/06; H04B10/14; H04B10/26
Domestic Patent References:
| JP5218758A | ||||
| JP8256119A | ||||
| JP865253A | ||||
| JP1022521A |
Attorney, Agent or Firm:
Yosuke Goto (1 person outside)