To provide a burst signal receiver whose transmission efficiency can be enhanced.

Every time a digital burst signal (a) is received, a storage circuit stores a threshold voltage (c) of an ATC circuit for each corresponding slave station and clock phase information p1 required for identification and recovery by a clock, then the threshold voltage and the clock phase information of the corresponding slave station having been stored in the storage circuit 8 are read just before a succeeding digital burst signal (a) is received from the corresponding slave station and preset as a threshold voltage (c) of the ATC circuit and as a clock phase for a clock generating circuit 3.