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Title:
CMP用研磨パッド、それを用いた基板の研磨方法及びCMP用研磨パッドの製造法
Document Type and Number:
Japanese Patent JP4317016
Kind Code:
B2
Abstract:
In CMP technology for planarizing an interlayer insulation film, a BPSG film, an insulation film for shallow trench isolation, or the like, in the production process of a semiconductor element, irregularities of a matter being polished, e.g. a silicon oxide film, are planarized efficiently at a high speed while suppressing the occurrence of polishing flaws on the substrate by employing a polishing pad having organic fibers exposed on the surface thereof abutting against the matter being polished.

Inventors:
Masaya Nishiyama
Masanobu Hakuro
Hojin Iwatsuki
Koichi Hiraoka
Application Number:
JP2003535247A
Publication Date:
August 19, 2009
Filing Date:
October 08, 2002
Export Citation:
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Assignee:
Hitachi Chemical Co., Ltd.
Shin-Kobe Electric Machinery Co., Ltd.
International Classes:
H01L21/304; B24B37/20; B24B37/24; B24D11/00; B24D13/14; B24D18/00; H01L21/3105
Domestic Patent References:
JP10255864A
JP2002001651A
JP2002166352A
JP2004511108A
Attorney, Agent or Firm:
Tetsuo Hotaka