Title:
CALCULATION AMPLIFIER CIRCUIT, SAMPLE-HOLD CIRCUIT, AND FILTER CIRCUIT
Document Type and Number:
Japanese Patent JP2006174033
Kind Code:
A
Abstract:
To provide a calculation amplifier circuit capable of reducing a common-mode gain and power consumption.
Variable current sources M2, M4 are provided to the common emitter of a differential amplifier 11. Output is directly fed back to each of the control terminals of the variable current sources. A new circuit is not required since common-mode feedback can be formed by the feedback. Consequently, a common-mode feedback circuit with less power consumption can be constituted.
Inventors:
ITAKURA TETSURO
KUROSE DAISUKE
UENO TAKESHI
KUROSE DAISUKE
UENO TAKESHI
Application Number:
JP2004363005A
Publication Date:
June 29, 2006
Filing Date:
December 15, 2004
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H03F3/45; H03F1/02; H03F3/343; H03H11/12
Attorney, Agent or Firm:
Amagi International Patent Office
Previous Patent: IMAGE DATA TRANSMISSION SYSTEM, IMAGE DATA RECEIVER AND IMAGE DATA TRANSMITTER
Next Patent: BIAS CURRENT CIRCUIT
Next Patent: BIAS CURRENT CIRCUIT